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SystemVerilog Assertion API - Introduction

Requirements

SystemVerilog provides assertion capabilities to enable:

Naming conventions

All elements added by this interface shall conform to the Verilog Procedural Interface (VPI) interface naming conventions.

Extensions to VPI enumerations

These extensions shall be appended to the contents of the vpi_user.h file, described in IEEE Std. 1364-2001.

Object types

This section lists the object property VPI calls. The VPI reserved range for these calls is 700 - 729 .

Object properties

This section lists the object property VPI calls. The VPI reserved range for these calls is 700 - 729.

#define vpiSequenceType 701
#define vpiAssertType 702
#define vpiCoverType 703
#define vpiPropertyType 704
#define vpiImmediateAssertType705

Callbacks:

This section lists the system callbacks. The VPI reserved range for these calls is 700 - 719 .

Assertion #define cbAssertionStart 700
#define cbAssertionSuccess 701
#define cbAssertionFailure 702
#define cbAssertionStepSuccess 703
#define cbAssertionStepFailure 704
#define cbAssertionDisable 705
#define cbAssertionEnable 706
#define cbAssertionReset 707
#define cbAssertionKill 708

“Assertion system”
#define cbAssertionSysInitialized709
#define cbAssertionSysStart 710
#define cbAssertionSysStop 711
#define cbAssertionSysEnd 712
#define cbAssertionSysReset 713

Control Constants:

This section lists the system control constant callbacks. The VPI reserved range for these calls is 730 - 759 .

Assertion #define vpiAssertionDisable 730
#define vpiAssertionEnable 731
#define vpiAssertionReset 732
#define vpiAssertionKill 733

Assertion stepping
#define vpiAssertionClockSteps 736

“Assertion system”
#define vpiAssertionSysStart 737
#define vpiAssertionSysStop 738
#define vpiAssertionSysEnd 739
#define vpiAssertionSysReset 740