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SystemVerilog Coverage API - Introduction

Requirements

This chapter defines the Coverage Application Programming Interface (API) in SystemVerilog.

SystemVerilog API

The following criteria are used within this API.

1) This API shall be similar for all coverages

There are a wide number of coverage types available, with possibly different sets offered by different vendors.

2) At a minimum, the following types of coverage shall be supported:

3) Coverage APIs shall be extensible in a transparent manner, i.e., adding a new coverage type shall not break any existing coverage usage.

4) This API shall provide means to obtain coverage information from specific sub-hierarchies of the design without requiring the user to enumerate all instances in those hierarchies.

Naming conventions

All elements added by this interface shall conform to the Verilog. Procedural Interface (VPI) interface naming conventions.


Nomenclature

The following terms are used in this standard.

Statement coverage - whether a statement has been executed or not, where statement is anything defined. Covered means it executed at least once. Some implementations also permit querying the execution count.

FSM coverage - The number of states in a finite state machine (FSM) that this simulation reached. This standard does not require FSM automatic extraction, but a standard mechanism to force specific extraction is available via pragmas.

Toggle coverage - For each bit of every signal (wire and register), whether that bit has both 0 value and a 1 value. Full coverage means both are seen; otherwise, some implementations can query for partial coverage.

Assertion coverage - For each assertion, whether it has had at least one success. Implementations permit querying for further details, such as attempt counts, success counts, failure counts and failure coverage.